The semiconductor device industry has a market driven need to reduce the size and cost of integrated circuits (ICs), including persistent memory devices such as floating gate memory and flash memory. As the dimensions of the memory devices are reduced, the voltage used to program the gates is reduced for reliability reasons associated with the thinner gate dielectric thickness. The thinner gate dielectrics for the smaller IC dimensions may have problems with leakage current levels, and thus the length of time the individual gate can retain the programmed charge may not be sufficient.
The floating gate of flash memory devices can be replaced with small crystals. These small crystals have been referred to as nanocrystals. The nanocrystals are located over the channel region, and separated from the channel region by a gate dielectric. The nanocrystals should be distributed and be capable of holding a sufficient charge so that, if programmed to hold charge, the nanocrystals will control the channel region below the nanocrystals as well as the region between the nanocrystals. Too few nanocrystals, over the entire channel or a portion of the channel, may not be able to control the channel. Too many nanocrystals, over the entire channel or a portion of the channel, may result in a leakage path in the gate dielectric such that some of the charge stored on the nanocrystals may be lost.